TOP > Research > Department of Systems and Social Informatics > Department of Information Engineering > Information Platform Group > EDAHIRO,Masato

Comprehensive List of Researchers "Information Knowledge"

Department of Information Engineering

Information Platform Group
Research Field
Embedded Multi- / Many-Core Processors Parallelism / Concurrency (Optimization / Algorithms / Software Development Tools / etc.)

Current Research

Optimization Techniques for Embedded Multi- / Many-Core Processors, Algorithms, Software Development Tools
Our research topics include optimization techniques, algorithms, software development tools for embedded multi- / many-core processors.
 Multi- / many-core processors increase even in embedded systems due to limit of minitualization of semiconductor technologies.  On these 'high-performance' processors, performance of existing software might not be 'high' because of lack of parallelism / concurrency. Novel software development methodology is desired in order to derive inherent parallelism / concurrency from future applications in embbeded systems and to bring out 'abilities' of multi- / many-core processors.


  • M. E. from University of Tokyo (Mathematical Engineering), Join NEC Corporation, 1985
  • Ph.D. from Princeton University (Computer Science), 1999
  • Research Fellow, System Devices Research Laboratories, NEC Corporation, 2002
  • Professor, Graduate School of Information Science, Nagoya University, 2011
  • Visiting Professor, Graduate School of Information Science and Technology, University of Tokyo (2008- )
  • Visiting Professor, Green Computing Systems Research Center, Waseda University (2011- )

Academic Societies

  • IEEE, OR Society of Japan, IEICE, IPSJ


  1. M. Edahiro and Y. Yamashita, Map Sort: A Scalable Sorting Algorithm for Multi-Core Processors, Int. Workshop on Innovative Architecture for Future Generation High-Performance Processors (IWIA), 2007. (Best Paper)
  2. M. Edahiro, An Efficient Zero-skew Routing Algorithm, ACM/IEEE Design Automation Conf. (DAC), 375-380, 1994. (Best Paper Candidate Nominated)
  3. M. Edahiro, I. Kokubo and T. Asano, A New Point-Location Algorithm and Its Practical Efficiency: Comparison with Existing Algorithms, ACM Trans. Graphics, Vol.3, No.2, 86-109, 1984.
  4. H. Inoue, A. Ikeno, T. Abe, J. Sakai and M. Edahiro, Dynamic Security Domain Scaling on Symmetric Multiprocessors for Future High-End Embedded Systems, Int. Conf. Hardware/Software Codesign & System Synthesis (CODES+ISSS), 39-44, 2007. (Best Paper)
  5. T. Asano, M. Edahiro, H. Imai, M. Iri, K. Murota, Practical Use of Bucketing Techniques in Computational Geometry, Computational Geometry (G. T. Toussaint, ed.), North-Holland, 153-195, 1985.